A Memory-Targeted Dynamic Reconfigurable Charge Pump to Achieve a Power Consumption Reduction in IoT Nodes

Targeting the more recently adopted low-power memories for data-logging operation in IoT nodes, this paper presents a simple reconfigurable dual-branch cross-coupled charge pump (CP) topology in which clock amplitude scaling and modulation of the number of stages are exploited to improve power efficiency and/or change the output voltage without degrading speed performance. The proposed solution allows a reduction of the power conversion losses, maintaining speed, maximum output voltage and silicon area unaltered as compared to the conventional charge pump. Post-layout simulation results confirm the effectiveness of the proposed topology which can be adapted to any other kind of linear charge pump

A Subthreshold Cross-Coupled Hybrid Charge Pump for 50-mV Cold-Start

In this article, a fully-integrated switched-capacitor DC-DC converter based on a Dickson charge pump able to work with input voltage levels that force the transistors working in subthreshold region is presented. The proposed topology exploits resistors in the charge transfer switch in order to overcome the limits of conventional solutions when working in the subthreshold regime. Post-layout simulations using a 28-nm FD-SOI technology show that the CP can boost an input voltage as low as 50 mV to a maximum output voltage of 270 mV, keeping a settling time about 25X lower than the conventional dual-branch cross-coupled charge pump and a voltage conversion efficiency higher than 76%. The proposed topology is particularly suited for the start-up of power management units supplied by thermoelectric generators

Who are the visitors of the art museums: Particularities of the publics of the weekends at the Art Museum of Tigre (Argentina)

Saber quiénes son sus visitantes es una de las principales tareas de los museos en la actualidad, en la medida en que fluctúan entre ajustarse a las imposiciones del sistema capitalista y convertirse en instituciones democráticas y participativas. No obstante, este aspecto resulta aun más dificultoso en los museos de arte, en virtud de los atributos particulares de su estructura y actores. El presente trabajo tiene como objetivo aproximar algunos criterios que permitan conocer quiénes son los visitantes de los museos de arte creados en Argentina desde el inicio del nuevo milenio. Dada la magnitud del desafío, se procura, con el foco puesto en un caso particular, trazar algunos lineamientos sostenidos en los enfoques teórico-críticos aplicados a la museología y en los estudios de públicos. En cuanto a lo metodológico, se recurrió a un estudio de visitantes que apeló a orientaciones cuantitativas y cualitativas, realizado en el Museo de Arte de Tigre durante 2017, centrado en los públicos del fin de semana. Se considera que, al indagar los rasgos singulares de esta entidad patrimonial, pueden identificarse algunos indicios que permitan comenzar a trazar un perfil, tanto general como específico, de los visitantes de los museos de arte.Knowing who its visitors are is one of the main tasks of museums today, as they fluctuate between conforming to the impositions of the capitalist system and becoming democratic and participatory institutions. However, this aspect is even more difficult in the arts museums because of the particular attributes of their structure and its diverse actors. The present work has as main object to bring near some criteria that may allow to know who are the visitors of the art museums in Argentina since the beginning of the new millennium. Given the extent of the challenge, we’ll try, focusing in a particular case, draw some guidelines sustained in the theorical-critical approaches applied to museology and studies of the publics. In terms of methodology, a visitor study was carried out at the Tigre Art Museum in 2017, using both quantitative and qualitative guidelines, focusing on weekend audiences. It is considered that, when we question the singularities of this entity, there are some indications that a general and specific profile of visitors to art museums can begin to be identified.Saber quem são seus visitantes é uma das principais tarefas dos museus na atualidade, na medida em que flutuam entre amoldar-se às imposições do sistema capitalista e converter-se em instituições democráticas e participativas. Não obstante, este aspecto resulta ainda mais dificultoso nos museus de arte, devido aos atributos particulares de sua estrutura e atores. O presente trabalho tem por objetivo aproximar alguns critérios que permitam conhecer quem são os visitantes dos museus de arte criados na Argentina desde o início do novo milênio. Dada a magnitude do desafio, e com o foco posto em um caso particular, buscou-se traçar alguns lineamentos sustentados nos enfoques teórico-críticos aplicados à museologia e nos estudos de públicos. Quanto à metodologia, a pesquisa teve como base um estudo de visitantes que apelou a orientações quantitativas e qualitativas, realizado no Museu de Arte de Tigre durante o ano de 2017, focado nos públicos de fim de semana. Considera-se que, ao indagarmos os traços singulares desta entidade, podem ser identificados alguns indícios que permitam começar a esboçar um perfil, tanto geral quanto específico, dos visitantes dos museus de arte.Fil: Panozzo Zenere, Alejandra Gabriela. Universidad Nacional de Rosario. Facultad de Ciencias Políticas y Relaciones Internacionales. Instituto de Investigaciones. Centro de Investigaciones en Mediatizaciones; Argentina. Consejo Nacional de Investigaciones Científicas y Técnicas. Centro Científico Tecnológico Conicet - Rosario; Argentin

0.5 V CMOS Inverter-Based Transconductance Amplifier with Quiescent Current Control

A two-stage CMOS transconductance amplifier based on the inverter topology, suitable for very low supply voltages and exhibiting rail-to-rail output capability is presented. The solution consists of the cascade of a noninverting and an inverting stage, both characterized by having only two complementary transistors between the supply rails. The amplifier provides class-AB operation with quiescent current control obtained through an auxiliary loop that utilizes the MOSFETs body terminals. Simulation results, referring to a commercial 28 nm bulk technology, show that the quiescent current of the amplifier can be controlled quite effectively, even adopting a supply voltage as low as 0.5 V. The designed solution consumes around 500 nA of quiescent current in typical conditions and provides a DC gain of around 51 dB, with a unity gain frequency of 1 MHz and phase margin of 70 degrees, for a parallel load of 1 pF and 1.5 MΩ. Settling time at 1% is 6.6 μs, and white noise is 125 nV/Hz

0.4-V, 81.3-nA Bulk-Driven Single-Stage CMOS OTA with Enhanced Transconductance

The paper describes a single-stage operational transconductance amplifier suitable for very-low-voltage operation in power-constrained applications. The proposed circuit avoids the tail current generator in the differential pair while preventing pseudo-differential operation. Moreover, the adoption of positive feedback allows increasing the stage transconductance while minimizing the current consumption. Experimental measurements on prototypes implemented in a standard CMOS 180-nm technology, show superior performance as compared to the state of the art

A High Efficiency and High Power Density Active AC/DC Converter for Battery-Less US-Powered IMDs in a 28-nm CMOS Technology

In this paper, the design and experimental validation of an active rectifier for ultrasound-based implanted biomedical devices are presented. One of the main contributions is the adoption of an optimized design procedure based on the $g_{m}/I_{D}$ of the transistors. Implemented in a 28-nm CMOS technology and powered by a 0.5-mm thickness and 1-mm2 surface area piezoelectric transducer, the rectifier delivers 1-mW of power to the output load. The adoption of a square wave to drive the transmitting power transducer is experimentally demonstrated to be more power effective. The rectifier exhibits a measured peak power conversion efficiency and a power density equal to 95% and 222mW/ $mm^{2}$ , respectively, revealing itself as the best trade-off between measured power conversion efficiency and power density within the literature of US-powered AC/DC converters

A Review of Charge Pump Topologies for the Power Management of IoT Nodes

With the aim of providing designer guidelines for choosing the most suitable solution, according to the given design specifications, in this paper a review of charge pump (CP) topologies for the power management of Internet of Things (IoT) nodes is presented. Power management of IoT nodes represents a challenging task, especially when the output of the energy harvester is in the order of few hundreds of millivolts. In these applications, the power management section can be profitably implemented, exploiting CPs. Indeed, presently, many different CP topologies have been presented in literature. Finally, a data-driven comparison is also provided, allowing for quantitative insight into the state-of-the-art of integrated CPs

A 28 nm Bulk CMOS Fully Digital BPSK Demodulator for US-Powered IMDs Downlink Communications

Low-invasive and battery-less implantable medical devices (IMDs) have been increasingly emerging in recent years. The developed solutions in the literature often concentrate on the Bidirectional Data-Link for long-term monitoring devices. Indeed, their ability to collect data and communicate them to the external world, namely Data Up-Link, has revealed a promising solution for bioelectronic medicine. Furthermore, the capacity to control organs such as the brain, nerves, heart-beat and gastrointestinal activities, made up through the manipulation of electrical transducers, could optimise therapeutic protocols and help patients’ pain relief. These kinds of stimulations come from the modulation of a powering signal generated from an externally placed unit coupled to the implanted receivers for power/data exchanging. The established communication is also defined as a Data Down-Link. In this framework, a new solution of the Binary Phase-Shift Keying (BPSK) demodulator is presented in this paper in order to design a robust, low-area, and low-power Down-Link for ultrasound (US)-powered IMDs. The implemented system is fully digital and PLL-free, thus reducing area occupation and making it fully synthesizable. Post-layout simulation results are reported using a 28 nm Bulk CMOS technology provided by TSMC. Using a 2 MHz carrier input signal and an implant depth of 1 cm, the data rate is up to 1.33 Mbit/s with a 50% duty cycle, while the minimum average power consumption is cut-down to 3.3 μW in the typical corner

A 28 nm Bulk CMOS Fully Digital BPSK Demodulator for US-Powered IMDs Downlink Communications

Low-invasive and battery-less implantable medical devices (IMDs) have been increasingly emerging in recent years. The developed solutions in the literature often concentrate on the Bidirectional Data-Link for long-term monitoring devices. Indeed, their ability to collect data and communicate them to the external world, namely Data Up-Link, has revealed a promising solution for bioelectronic medicine. Furthermore, the capacity to control organs such as the brain, nerves, heart-beat and gastrointestinal activities, made up through the manipulation of electrical transducers, could optimise therapeutic protocols and help patients’ pain relief. These kinds of stimulations come from the modulation of a powering signal generated from an externally placed unit coupled to the implanted receivers for power/data exchanging. The established communication is also defined as a Data Down-Link. In this framework, a new solution of the Binary Phase-Shift Keying (BPSK) demodulator is presented in this paper in order to design a robust, low-area, and low-power Down-Link for ultrasound (US)-powered IMDs. The implemented system is fully digital and PLL-free, thus reducing area occupation and making it fully synthesizable. Post-layout simulation results are reported using a 28 nm Bulk CMOS technology provided by TSMC. Using a 2 MHz carrier input signal and an implant depth of 1 cm, the data rate is up to 1.33 Mbit/s with a 50% duty cycle, while the minimum average power consumption is cut-down to 3.3 μW in the typical corner

A Review of Power Management Integrated Circuits for Ultrasound-Based Energy Harvesting in Implantable Medical Devices

This paper aims to review the recent architectures of power management units for ultrasound-based energy harvesting, while focusing on battery-less implantable medical devices. In such systems, energy sustainability is based on piezoelectric devices and a power management circuit, which represents a key building block since it maximizes the power extracted from the piezoelectric devices and delivers it to the other building blocks of the implanted device. Since the power budget is strongly constrained by the dimension of the piezoelectric energy harvester, complexity of topologies have been increased bit by bit in order to achieve improved power efficiency also in difficult operative conditions. With this in mind, the introduced work consists of a comprehensive presentation of the main blocks of a generic power management unit for ultrasound-based energy harvesting and its operative principles, a review of the prior art and a comparative study of the performance achieved by the considered solutions. Finally, design guidelines are provided, allowing the designer to choose the best topology according to the given design specifications and technology adopted